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PCs and Embedded Systems
News Release from: Cypress Semiconductor | Subject: PSoC Designer development tool
Edited by the Engineeringtalk Editorial
Team on 08 November 2001
Morphing in an analogue and digital
world
A micro controller that can "morph" from one set of functions to another on the fly? Cypress has introduced essentially a Programmable System on a Chip micro controller, as this article explains
In the every day life of today's design engineer, problems constantly occur when the digital domain meets the analogue world The conventional world for today's design engineer means Standard Micros with Discrete Analogue Components! Everyone loves digital design, micro controllers are simple to use, products get differentiated with smart firmware and updates are easy to make with changes in that firmware
This article was originally published on Engineeringtalk on 23 Feb 2001 at 8.00am (UK)
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However, we live in an analogue world, many designs must have ADCs or DACs and the signals often need filtering or conditioning.
They usually come fixed to the PCB and are difficult to change once designed.
The applications that use micro controllers seem endless.
The most common solution is to provide the engineer an endless list of part numbers each of which describes a fixed set of peripherals, i.e timers, UARTS, ADCs etc.
The typical solution is to choose a micro controller that nearly fits the application.
Further reading
Transient Voltage Surge Suppressors: not all alike
Mick Burgoyne, Chief Engineer at Power Quality Management specialist Advance-Galatrek examines the technology behind one of the most critical - and yet neglected - power chain devices.
Can TVSSs solve communications problems?
Mick Burgoyne, Chief Engineer at Advance Galatrek looks at how telecomms and data installations can benefit from the installation of the latest voltage surge suppression technology.
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Similarly, there is the situation where a peripheral, such as a UART, is only used rarely during the lifetime of the product.
An example of this is a UART that may only be used for field downloads.
It would be efficient if the micro controller had the ability to create a UART out of the resources that it has available, when needed.
Once the field download was completed the micro could reconfigure itself and use the resources that it used to construct the UART for its day-to-day function.
This sounds too good to be true; a micro controller that can "morph" from one set of functions to another on the fly! Cypress has launched a product to support just that: So what does this new family of devices look like, what are its features, how can you use these in today's designs and most importantly is the software support easy and efficient to use? Essentially we are looking at a Programmable System on a Chip micro controller.
This device consists of a CPU, Flash memory, SRAM and a set of low-level analogue and digital elements that can be interconnected to create a multitude of peripherals.
The interconnections are configured via registers accessible by the CPU, this flexibility has the added bonus of dynamic configurability; changing the peripheral mix under the control of the firmware.
The core of the PSoC micro controller is the array of digital and analogue PSoC Blocks.
These blocks are the low level elements that can be connected together and configured to build User Modules.
A User Module is the Cypress Microsystems language for useful function analogous to an on-chip peripheral.
Lets look at the low level elements that are used to make up User Modules in more detail: - There are 8 Digital PSoC Blocks in every micro controller.
Of the 8 there are two types, the Basic Type A and the Communication Type A.
Each type is an 8-bit wide digital resource.
The blocks can be chained together to form wider bit widths and more complex peripherals such as timers, counters and pulse width modulators.
Functions such as timers, counters, CRCs, and PRSs are available on Basic Type A blocks whereas UART and SPI communication functions are available on the Digital Communications Type A blocks.
There are 12 Analogue PSoC Blocks in every micro controller.
Of the 12 there are three different types, the Analogue Continuous Time Type A, the Analogue Switched Capacitor Type A and the Analogue Switched Capacitor Type B.
The continuous time type A analogue block supports programmable gain or attenuation operational amplifier circuits, differential gain instrumentation amplifiers, continuous time high frequency anti-aliasing filters and modest response-time analogue comparators.
The Analogue Switched Capacitor Type A analogue block supports Delta Sigma Successive Approximation and Incremental A/D conversion, Capacitor DACs, and Switched Capacitor Filters.
The block has three input arrays of binary weighted switched capacitors, allowing user programmability of the capacitor weights.
This provides summing capability of two (CDAC) scaled inputs and a non-switched capacitor input.
Since the input of the switched capacitor Block A has this additional switched capacitor, it is configured for the input stage of a switched capacitor biquad filter.
When followed by a switched capacitor block B Integrator, this combination of blocks can be used to provide a full Switched Capacitor Biquad.
The Analogue Switched Capacitor Type B analogue block also supports Delta Sigma Successive Approximation and Incremental A/D conversion, Capacitor DACs, and Switched Capacitor Filters.
It has two input arrays of switched capacitors and a non-switched capacitor feedback array from the output.
When preceded by a switched capacitor type A Integrator, the combination can be used to provide a full Switched Capacitor Biquad.
By combining the low level structures described above, Cypress Microsystems provide the PSoC( user with high-level peripherals called User Modules.
These modules allow the user to simply drag and drop peripherals onto their PSoC( system using the PSoC( Designer Device Editor.
The types of User Modules available are listed below: Digital User Modules: Timers - 8, 16, 24, or 32-bit; Counters - 8, 16, 24, or 32 -bit; Pseudo random sequence (PRS) generator; PWM - 8, 16 bit Pulse width modulator; PWMDB - 8, 16 bit PWM with dead band; Cyclic Redundancy Check (CRC) generator; 8 bit serial transmitter; 8 bit serial receiver; UART - full or half duplex; SPI master; SPI slave.
Analogue User Modules: Amplifiers; Comparators; Filters: BiQuad, 2, 4, 6 Pole; ADCs: Incremental, Delta-Sigma, SAR; DACs; Modulator/Demodulators.
The above list is simply those modules that are currently available with the PSoC Designer development tool that can be downloaded (free) from the web.
The list is not complete as User Modules can be created by the user and added to the library.
The software for developing the actual device follows the flow as set out below.
In the interests of space, I have discussed the complete flow, but have set out more detail on the issues of Editing and Compiling: The procedure of creating a Programmable System on a Chip begins with the Device Editor.
PSoC Device Editor User Module Selector allows the user to browse through the User Modules (peripherals).
Each User Module has a complete data sheet associated with it.
This gives the designer all the details they may require when designing their circuit.
Most importantly, the data sheet also gives details of the APIs that will be created once the device has been compiled.
In order to assist with the firmware design, the data sheet also has example assembler code that shows a typical usage of the user modules via the APIs.
This code has been written so that it can be cut and pasted from the data sheet into the engineers' firmware.
This is an excellent feature as it reduces the time taken to understand the syntax of the API and allows the engineer to focus on using the module in the system and remove the burden of learning a new syntax.
Once the selection is complete, the User Modules must now be placed onto the PSoC silicon and interconnected as required.
This procedure is carried out using the Place User Modules page of the PSoC Device Editor.
The final task requires the user to connect the User Modules to the pins of the chip itself.
This task is performed on the Specify Pinout page of the PSoC Device Editor.
By simply clicking on the device pin, the drop down menu allows selection of drive level required (High-Z, pull up, pull down, strong) and internal node that is to be connected to the pin.
Once the pinout has been selected the project can now be compiled.
The compilation process builds the required boot and main assembler files.
The boot.asm files' primary function is to configure the PSoC, initialise 'C' variables, organise interrupt tables, define the reset vector and call the main (_main) routine.
A skeleton main.asm file is also created which is where the user begins writing their firmware.
Once the device has been compiled this is the most exciting time for the engineer for he/she has just designed their very own semi-conductor device.
It is unique to their application.
It is now possible to generate a data sheet for their new creation.
This documentation is ideal as it reduces the time taken to create design specifications.
All the information required to describe the new chip is detailed in this data sheet.
Now that a micro controller has been created which has the correct number of peripherals included to perfectly fit the application targeted, work can begin on developing the firmware.
The M8C processor executes the firmware.
All coding of the firmware is carried out in the Application Editor.
It is the Application Editor from which the development of firmware takes place.
The default editor uses assembler but the user can invoke the 'C' Compiler from the Tools option on the menu bar at the top of the screen.
Standard calling conventions are recognised in the 'C' Compiler and Assembler.
An underscore is implicitly added to 'C' functions and variables.
This should be applied when declaring and referencing functions and variables between 'C' and assembler source.
With the development of firmware complete, testing and debug is now required.
This process can be carried out using the PSoC Designer Debugger, along side as In-Circuit Emulator (ICE) pod, will allow the engineer to test their firmware in a physical system while providing an internal view of the PSoC device.
It is clear from the design flow described above, that the PSoC Integrated Development Environment allows the engineer to design and develop his or her own unique micro controller quickly and efficiently.
Direct programming of the PSoC block configuration registers allows Dynamic configurability, meaning peripherals can be changed, removed and added during firmware execution.
This flexibility gives real power to the PSoC.
By understanding the needs of today's Design Engineering community, Cypress has designed a micro controller that is sure to have an impact on the micro controller business, where time to market, flexibility, reduced part count, and easy to use software are an absolute must!.
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